I'm writing a book based on 64-bit Raspberry Pi OS, https://nostarch.com/introcomputerorgforarm. It's an introductory book. In the discussion about memory caches, I want to give the cache sizes of several RPi models, but I find conflicting information online. Some people say that even tools like might not be accurate.
I give the following information in my book:where L1i is Level 1 instruction, L1d is Level1 data, L2u is Level 2 unified, and 4 x means for each of the four cores.
Is this correct?
Code:
lscpu -CI give the following information in my book:
Code:
3 A+,B,B+: L1i 4 x 32KB; L1d 4 x 2KB; L2u 512KB.4B: L1i 4 x 48KB; L1d 4 x 32KB; L2u 1MB5: L1i 4 x 64KB; L2d 4 x 64KB; L2u 4 x 512KB; L3u 2MB.Is this correct?
Statistics: Posted by rplantz — Fri Feb 09, 2024 7:50 pm — Replies 0 — Views 20