Advanced users • PCIe DMA Address translation

Can anyone explain whats going on with PCIe DMA Address translation in RPi5 ?

In: https://github.com/raspberrypi/linux/bl ... .dtsi#L926
we see an offset presumably removed by the IOMMU for the RP1 PCIe port, then further down we see:

https://github.com/raspberrypi/linux/bl ... dtsi#L1121

dma-ranges = <0x02000000 0x00 0x00000000
0x1f 0x00000000
0x00 0x00400000>,
<0x43000000 0x10 0x00000000
0x00 0x00000000
0x10 0x00000000>;

So, I think PCIe dma / bus masters access address 0 get there accesses translated to 0x10,0000,0000 then back to 0 by the IOMMU, so a PCIe bus master reading address 0 ends up accessing cpu address 0, but why jump through this 2 step translation ?

And does the IOMMU hack apply to the other PCIe root complexes, specifically pcie1: pcie@11000 (which is the one available to plug in user devices) as this has a similar set of dma ranges:
(Also why is the pre-fetchable flag not set ?)

Ie if I were to do a pcie dma from address 0 on a device on this root port, would it end up accessing cpu address 0 or 0x10,0000,0000 ?

Statistics: Posted by neiljay — Tue Dec 10, 2024 3:30 pm — Replies 0 — Views 25

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