I am transfering an array to PIO using a chained DMA, which runs continuously and forever. That works very well.
Now, I would like the sequence to stop after certain number of repetitions. Is there a way to configure this in the DMA directly, by using TRANS_COUNT registers?
Here is how I configure the DMA now:
Now, I would like the sequence to stop after certain number of repetitions. Is there a way to configure this in the DMA directly, by using TRANS_COUNT registers?
Here is how I configure the DMA now:
Code:
DMA_BASE=0x50000000CH0_READ_ADDR =DMA_BASE+0x000CH0_WRITE_ADDR =DMA_BASE+0x004CH0_TRANS_COUNT=DMA_BASE+0x008CH0_CTRL_TRIG =DMA_BASE+0x00cCH0_AL1_CTRL =DMA_BASE+0x010CH1_READ_ADDR =DMA_BASE+0x040CH1_WRITE_ADDR =DMA_BASE+0x044CH1_TRANS_COUNT=DMA_BASE+0x048CH1_CTRL_TRIG =DMA_BASE+0x04cCH1_AL1_CTRL =DMA_BASE+0x050PIO0_BASE =0x50200000PIO0_TXF0 =PIO0_BASE+0x10PIO0_SM0_CLKDIV=PIO0_BASE+0xc8CHAN_ABORT =DMA_BASE+0x444def startDMA(ar,nword): mem32[CHAN_ABORT]=3 #first disable the DMAs to prevent corruption while writing mem32[CH0_AL1_CTRL]=0 mem32[CH1_AL1_CTRL]=0 # setup first DMA which does the actual transfer mem32[CH0_READ_ADDR]=addressof(ar) mem32[CH0_WRITE_ADDR]=PIO0_TXF0 mem32[CH0_TRANS_COUNT]= nword IRQ_QUIET=0x1 # do not generate an interrupt TREQ_SEL=0x00 # wait for PIO0_TX0 CHAIN_TO=1 # start channel 1 when done RING_SEL=0 RING_SIZE=0 # no wrapping INCR_WRITE=0 # for write to array INCR_READ=1 # for read from array DATA_SIZE=2 # 32-bit word transfer HIGH_PRIORITY=1 EN=1 CTRL0=(IRQ_QUIET<<21)|(TREQ_SEL<<15)|(CHAIN_TO<<11)|(RING_SEL<<10)|(RING_SIZE<<9)|(INCR_WRITE<<5)|(INCR_READ<<4)|(DATA_SIZE<<2)|(HIGH_PRIORITY<<1)|(EN<<0) mem32[CH0_AL1_CTRL]=CTRL0 # setup second DMA which reconfigures the first channel p[0]=addressof(ar) mem32[CH1_READ_ADDR]=addressof(p) mem32[CH1_WRITE_ADDR]=CH0_READ_ADDR mem32[CH1_TRANS_COUNT]=1 IRQ_QUIET=0x0 #do not generate an interrupt TREQ_SEL=0x3f #no pacing, immediate transfer CHAIN_TO=0 # do not chain further. start channel 0 when done RING_SEL=0 # no ring mode RING_SIZE=0 #no wrapping INCR_WRITE=0 #single write INCR_READ=0 #single read DATA_SIZE=2 #32-bit word transfer HIGH_PRIORITY=1 EN=1 CTRL1=(IRQ_QUIET<<21)|(TREQ_SEL<<15)|(CHAIN_TO<<11)|(RING_SEL<<10)|(RING_SIZE<<9)|(INCR_WRITE<<5)|(INCR_READ<<4)|(DATA_SIZE<<2)|(HIGH_PRIORITY<<1)|(EN<<0) mem32[CH1_CTRL_TRIG]=CTRL1Statistics: Posted by pjak — Sun Mar 02, 2025 12:00 am — Replies 0 — Views 46